Digital systems often use complementary metal-oxide-semiconductor (CMOS) circuits as interface or "glue" logic. Higher-performance systems require increased speed and current requirements for the glue logic. Higher current drive increases speed because load capacitances are more quickly charged or discharged. Unfortunately, unwanted noise often increases too.
CMOS chips with higher-drive output buffers often produce a type of noise known as ground bounce, due to rapid changes in current through the parasitic inductances of the integrated circuit (IC) package. These inductances resist changes in current by changing the voltages on power or ground supplies. Such voltage changes can falsely trigger logic within the IC device, or other devices in the system.
The rate of voltage change of the output, the edge rate, increases for these faster devices. The high edge rate can reflect off the ends of printed-circuit-board (PCB) wiring traces driven by the output buffer. These reflections produce voltage variations known as undershoot, overshoot, and ringing (oscillation). Careful layout of these wiring traces is needed to minimize trace-ends that can cause reflections. Termination devices such as resistors to ground at the ends of the traces are often used to absorb the reflection-causing wave front produced by the high edge rate.
FIG. 1 shows a memory module using a buffer or driver. Inputs to the memory module are buffered by driver 10. Driver 10 drives the input to synchronous dynamic-random-access memory (SDRAM) 12. SDRAMs require precise clock inputs for timing.
The output from driver 10 is distributed to the inputs of SDRAMs 12 by wiring traces on the printed-circuit board (PCB) of the memory module. These wiring traces have a small amount of resistance 16 that is distributed throughout the wiring trace. The input pins of SDRAMs 12 have a relatively large capacitance. Overall capacitance can reach 70 pF. Thus a significant R-C delay occurs, and driver 10 must have a high current drive to meet timing requirements for the memory module.
Dampening resistor 14 is sometimes used. Dampening resistor 14 is in series on the wiring trace between driver 10 and SDRAMs 12 rather than being a resistor to power or ground. Dampening resistors reduce or slow down the high edge rate as well as any reflections. Unfortunately, the speed of the output buffer is also reduced.
While discrete dampening resistors are often used, the output buffer of driver 10 itself provides some impedance, which also acts as a dampening resistor. Unfortunately, this impedance decreases with higher-current-drive output buffers. The lower impedance of these output buffers creates a greater mis-match between the output buffer's impedance and the impedance of the wiring trace.
A series resistance of about 33 ohms is used for dampening resistor 14. When driving a 70 pF load of inputs to SDRAM 12, an R-C delay of 2.3 ns occurs. As desired buffer speeds drop below 4 ns, this R-C delay is a significant design burden.
High speed requires high-drive output buffers. These high-drive buffers have impedances of perhaps only 5 ohms, far less than the 35 to 30 ohms required for a series dampening resistor. Thus the output impedance is not sufficient for the needed dampening resistance.
Power budgets also limit the quality of termination. Lower-impedance resistors consume much power. CMOS chips driving terminated lines can only sink or source a limited amount of current in the static or D.C. state.
FIG. 2 is a diagram of a waveform of a prior-art high-drive output buffer driving a PCB wiring trace. The high current drive of the output buffer produces a high edge rate that rapidly changes the output voltage from ground to the power-supply voltage, Vcc. The high edge rate produces a wave front that travels down the wiring trace and reflects off one or more ends. The reflected wave front then travels back up the wiring trace to the output buffer, and raises the voltage at the output buffer when the reflected wave arrives. The raised voltage is above Vcc and is known as an overshoot. This reflected wave then reverses direction and travels back to the end of the wiring trace, is reflected, and again reaches the output buffer, producing a series of both overshoots and undershoots, known as ringing. Since the reflected wave is dampened and loses energy at each reflection, the amplitude of the ringing gradually decreases. Low-going ringing (undershoot) is caused by a mis-match in impedance. Multiple reflections interfere with each other and cause the ringing.
When the output buffer switches from high to low, another high-edge rate wave travels down the wiring trace and is reflected back, producing undershoot and more ringing. This undershoot can cause ground bounce inside the output buffer's IC.
When the ringing, overshoot, or undershoot is large, logic can read a static signal as low when the static signal is actually high. For example, a static 3-volt signal input to another pin of the IC is a high signal, but when the internal ground of the IC bounces up from 0 volt to 2 volt, the static 3-volt signal appears to be a 1-volt signal, a low input. When the input signal is connected to a latch or flip-flop, the false low can be latched in, causing an error. Thus noise is a serious problem.
Several prior-art solutions to these problems are known. For example, Pierce et al., U.S. Pat. No. 5,319,252, assigned to Xilinx Inc. of San Jose, Calif., discloses an output buffer which gradually turns output buffers on and off so that there is no sharp discontinuity in the current flow. The output voltage is fed back to gradually turn off the output buffer at the end of the voltage transition. Lipp in U.S. Pat. No. 5,347,177, discloses a closed-loop trace which is driven by output buffers with level-sensitive impedance control.
Sharpe-Geisler, U.S. Pat. No. 5,438,277, assigned to Advanced Micro Devices of Sunnyvale, Calif., discloses an output buffer using two pull-down devices. A noisy (larger) pull-down device is connected to a noisy ground (having ground bounce) while a quiet (smaller) pull-down device is connected to a quiet ground. A one-shot triggered by an internal signal first switches on the noisy pull-down, then turns off the noisy pulldown and turns on the quiet pull-down. Kang, U.S. Pat. No. 5,410,262, assigned to Samsung, is a similar approach.
Output-buffer pulsing and neighbor sensing were disclosed by Kwong in U.S. Pat. Nos. 5,717,343 and 5,963,047, both and assigned to Pericom Semiconductor.
What is desired is an output buffer or driver with high current drive and high speed. It is desired to reduce noise from the fast edge rate, such as ringing, undershoot, overshoot, and ground bounce. It is desired to dynamically control the impedance of the output buffer to provide low impedance as the output voltage is rapidly changing, but high impedance when the reflected wave front is received to dampen the reflections. It is desired to provide an active termination that matches the trace resistance of a memory module clock line. It is desired to provide series resistance within the output buffer so that the external series dampening resistor can be eliminated. Active termination with relatively constant resistance across various voltage ranges is desired. A high-speed output buffer with low resistance during switching but higher resistance after switching is desired.